Projeto-IF674-2021 JDaniloC · COMPLETED
Learning Assembly Mips and building a processor using verilog.
github.com/JDaniloC/Projeto-IF674-2021 · ★ 0 · Forks 0 · Size 522 KB
SUMMARY
Technologies 1
Scored 1
Observed 1
Practices 6
Evidence 1
Skips 0
COVERAGE
Analyzed 38 files · 98 commits · 0 API calls
TECHNOLOGIES & DEPTH
Markdown LANGUAGE Depth 70
2 files · PRODUCTION
PRACTICES
documentation · observedautomated_tests · absentcontinuous_integration · absentcontainerization · absentlinting · absentformatting · absent
ACTIVITY & OWNERSHIP
First commit 2021-09-23
Last commit 2021-11-28
Active months 3
Commits 98